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Arm and Synopsys strengthen partnership

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Accelerate custom silicon on advanced nodes.

Synopsys has expanded its collaboration with Arm to provide optimized IP and EDA solutions for the newest Arm® technology, including the Arm Neoverse™ V2 platform and Arm Neoverse Compute Subsystem (CSS). Synopsys has joined Arm Total Design where Synopsys will leverage their deep design expertise, the Synopsys.ai™ full-stack AI-driven EDA suite, and Synopsys Interface, Security, and Silicon Lifecycle Management IP to help mutual customers speed development of their Arm-based CSS solutions. The expanded partnership builds on three decades of collaboration to enable mutual customers to quickly develop specialized silicon at lower cost, with less risk and faster time to market.

"With Arm Total Design, our aim is to enable rapid innovation on Arm Neoverse CSS and engage critical ecosystem expertise at every stage of SoC development," said Mohamed Awad, senior vice president and general manager, Infrastructure Line of Business at Arm. "Our deep technical collaboration with Synopsys to deliver pre-integrated and validated IP and EDA tools will help our mutual customers address the industry's most complex computing challenges with specialized compute."

"The Synopsys.ai full-stack AI-driven EDA suite, leading IP solutions, virtual prototyping, and hardware-assisted verification for Arm-based systems, combined with our engagement in Arm Total Design, strengthen our partnership with Arm to help our customers address their toughest design challenges," said Shankar Krishnamoorthy, general manager of the Synopsys EDA Group. "Our extensive co-optimization efforts with Arm continue to push the boundaries of performance and power efficiency for the new era of advanced-node, multi-die system designs."

Seamless Interoperability and Reduced Design Risk

In addition to joining Arm Total Design, Synopsys and Arm have renewed their agreement to optimize interoperability, performance, and bandwidth of systems using Arm processors and Synopsys Interface, Security, and Silicon Lifecycle Management IP. Testing interoperability of IP and processors both pre-silicon and in silicon provides detailed performance analysis that reduces design risk, and renewing the agreement helps to ensure that all Arm processors and subsystems work seamlessly with the Synopsys IP.

Customers using the Synopsys.ai full-stack AI-driven EDA suite can unlock massive productivity gains by harnessing the power of AI from system architecture to design and manufacturing. Applying this technology to Arm Neoverse V2 core development offers mutual customers the ability to accelerate their chip development by using AI to handle repetitive tasks such as design space exploration, verification coverage and regression analytics, and test program generation.

Synopsys offers Fusion QuickStart Implementation Kits (QIKs) for Arm Neoverse V2, Arm Cortex®, Arm Immortalis™ and Arm Mali™ processor families. This includes providing implementation scripts and reference guides that enable customers to accelerate time to market and achieve their demanding performance-per-watt targets by providing an optimized starting point for their design. The QIKs can be used along with Synopsys Fusion Compiler and Synopsys DSO.ai™ tools to drive even higher productivity for better results, faster.

The Synopsys Verification Family provides a comprehensive flow for Arm Neoverse V2 verification and software development. Using Synopsys architecture design solutions integrated with Arm CMN interconnect performance models, virtual prototyping with Arm Fast Models, hardware-assisted verification, and verification IP, customers can start software development earlier, accelerate software-hardware bring-up, and shift-left performance and power validation. Synopsys' combined solutions offer customers a streamlined development cycle for Arm Neoverse V2 platform, helping to deliver SoCs and multi-die systems to market faster.

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