Loading...
News Article

Toppan Photomask signs agreement with IBM

News

Advancing development of EUV photomasks for IBM’s 2 nanometer technology designs.

Toppan Photomask has entered into a joint research and development agreement with IBM related to the 2 nanometer (nm) logic semiconductor node, using extreme ultraviolet (EUV) lithography. This agreement also includes High-NA EUV photomask development capability on next-generation semiconductors.

Based on this agreement, for a period of five years starting 1Q 2024, IBM and Toppan Photomask plan to develop photomask capability at the Albany NanoTech Complex (Albany, NY, USA) and Toppan Photomask's Asaka Plant (Niiza, Japan).

Mass production of 2nm node and beyond semiconductors requires advanced knowledge in material selection and process control that far exceed the requirements of conventional mainstream exposure technology using an ArF excimer laser as a light source. The IBM and Toppan Photomask agreement brings these essential material and process control skills together to provide commercial solutions for 2nm node and beyond printing.

IBM and Toppan Photomask have a long history of technical cooperation. From 2005 to 2015, IBM and Toppan Photomask (then Toppan Printing) jointly developed photomasks for advanced semiconductors. Starting with 45nm node generation, the scope of joint development expanded to 32nm, 22/20nm, and 14nm nodes that included initial EUV research and development activities. The accumulated technological expertise has contributed to the advancement of the global semiconductor industry.

Since then, Toppan Photomask has continued to actively develop and produce masks and substrate materials for EUV lithography. Additionally, manufacture of EUV production and next-generation development masks requires advanced multi-beam lithography equipment. Toppan Photomask is installing several of these systems to meet the latest semiconductor technology roadmap requirements.

Teruo Ninomiya, President and CEO at Toppan Photomask, said, "Our cooperation with IBM is very important for both companies. This agreement will play a crucial role in supporting semiconductor miniaturization, promoting the advancement of the industry, and contributing to the growth of Japan's semiconductor sector. We are truly honored to have been selected as a partner based on a comprehensive evaluation of our technological capabilities and cost competitiveness, and we are committed to accelerating the realization of miniaturization for 2nm and beyond."

Huiming Bu, VP of Global Semiconductor R&D at IBM, said, "New photomask capabilities using EUV and High-NA EUV lithography systems will likely play a critical role in designing and producing semiconductor technologies at the 2nm node and beyond. Our collaboration with Toppan Photomask aims to accelerate innovations in advanced logic scaling through the development of new solutions to enable advanced foundry manufacturing capabilities, a critical part of the semiconductor supply chain in Japan."

Silicon photonics: accelerating growth in the race for high-speed optical interconnects
CCD-in-CMOS technology enables ultra-fast burst mode imaging
2025 6G A look forward
Critical Manufacturing climbs Deloitte’s Technology Fast 50
Semiconductors: The most important thing you probably know the least about
Imec and partners unveil SWIR sensor with lead-free quantum dot photodiodes
Lattice introduces small and mid-range FPGA offerings
SEMI and SMT inspection solutions at NEPCON Japan 2025
Nordic Semiconductor and Kigen demonstrate Remote SIM Provisioning for Massive IoT
Spirent collaborates with Siemens
Quobly forges strategic collaboration with STMicroelectronics
New standards in pressure measurement systems for the semiconductor industry
IBM delivers optics breakthrough
Semiconductor equipment sales to reach $139 Billion in 2026
Marvell introduces 1.6 Tbps LPO Chipset
ACM research strengthens Atomic Layer Deposition portfolio
CEA-Leti demonstrates embedded FeRAM platform compatible with 22nm FD-SOI node
Lattice introduces small and mid-range FPGA offerings
Solace unlocks full potential of event-driven integration
Advantest to showcase latest test solutions at SEMICON Japan 2024
CEA-Leti device integrates light sensing and modulation
Nordic launches Thingy:91 X prototyping platform for cellular IoT and Wi-Fi locationing
Imec achieves seamless InP Chiplet integration on 300mm RF Silicon Interposer
High-precision SMU
Powering India’s energy future
China’s Nvidia probe puts global investors ‘on notice’
POET Technologies appoints new director
Imec demonstrates core building blocks of a scalable, CMOS-fab compatible superconducting digital technology
Imec proposes double-row CFET for the A7 technology node
ULVAC launches new deposition system
Beebolt and SEMI Announce Strategic Partnership to Drive Supplier Resilience and Agility
esmo group introduces Automated Final Test Manipulator
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
x
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: