Tenstorrent selected to help build Japan's AI future
Tenstorrent has agreed a partnership deal with Japan's Leading-edge Semiconductor Technology Center (LSTC), which selected Tenstorrent's world-class RISC-V and Chiplet IP for its all-new edge 2nm AI Accelerator.
In addition to the IP licensing portion of this deal, Tenstorrent will work with LSTC as a collaborative innovation partner to co-design the chip that will redefine AI performance in Japan.
Under this project, Tenstorrent will also work with Rapidus Corporation, a newly founded Japanese semiconductor company that will develop state-of-the-art logic semiconductor technologies with an ambitious goal to achieve the world's best cycle time reduction services. Rapidus is planning to serve not only for wafer processing but also advanced packaging to meet the customer's specific needs through maximizing the effectiveness of the total manufacturing process. Their strategy is well aligned with Tenstorrent's direction.
Long known to offer the highest performing RISC-V CPU technology in the market, Tenstorrent will leverage its Ascalon RISC-V CPU core technology to co-develop a RISC-V CPU chiplet for LSTC's new edge AI accelerator. Tenstorrent and LSTC share the same vision that the future of silicon will be driven by heterogeneous compute - the combining of RISC-V CPU and AI cores that are designed to be used together to handle any workload.
Tenstorrent is an ideal partner for LSTC based not only on the strength of Tenstorrent's RISC-V CPU technology and expertise in artificial intelligence, but also because of the strength of Tenstorrent's team and its commitment to Japan. Tenstorrent is led by industry legend chip architect CEO Jim Keller who has a storied history of building high-profile, commercially successful silicon products such as Tesla's first self-driving chip, chips for the Apple iPad, and AMD's Zen architecture. Under Keller's leadership, Tenstorrent's success in AI, RISC-V CPU, and heterogeneous compute development made it easy for LSTC to choose Tenstorrent to work with to co-design their hardware.
""The joint effort by Tenstorrent and LSTC to create a chiplet-based edge AI accelerator represents a groundbreaking venture into the first cross-organizational chiplet development in semiconductor industry," said Wei-Han Lien, Chief Architect of Tenstorrent's RISC-V products. "The edge AI accelerator will incorporate LSTC's AI chiplet along with Tenstorrent's RISC-V and peripheral chiplet technology. This pioneering strategy harnesses the collective capabilities of both organizations to use the adaptable and efficient nature of chiplet technology to meet the increasing needs of AI applications at the edge."
"Tenstorrent is the perfect partner for us in this Post 5G Project," said Tetsuro Higashi, chairman of LSTC. "As a next-generation semiconductor design technology, we will promote the development of edge AI accelerators dedicated to edge inference processing applications, including generative AI, through international collaboration. Edge AI accelerators enable high-speed arithmetic processing with low power consumption."
"I am very pleased that this collaboration started as an actual project from the MOC conclusion with Tenstorrent last November," said Atsuyoshi Koike, president and CEO of Rapidus Corporation. "We will cooperate not only in the front-end process but also in the chiplet (back-end process), and work on as a leading example of our business model that realizes everything from design to back-end process in a shorter period of time ever."
"This is a pivotal moment for Japan, for LSTC, for Rapidus, and for Tenstorrent. Having spent a large part of my career in Japan, I know how important it is for Japan to reestablish leadership in the design of high performance compute," said David Bennett, Chief Customer Officer of Tenstorrent. "It is with great pleasure that I also announce that Tenstorrent will be opening a high performance compute design center in Japan to support not only this project and our customers, but also to help nurture and develop the future of Japan's high performance compute industry."
