Loading...
News Article

EverGlade funding alert

News

The U.S. government, through CHIPS for America, has announced a groundbreaking funding opportunity aimed at bolstering domestic research and development (R&D) in advanced semiconductor packaging materials and substrates.

The initiative, part of the National Advanced Packaging Manufacturing Program (NAPMP), is set to inject approximately $300 million into innovations spanning semiconductor-based materials to glass and organics. This funding opportunity marks a significant step in the U.S.'s commitment to maintaining and advancing its leadership in the global semiconductor industry.

"This funding opportunity represents a pivotal moment for the U.S. semiconductor industry. By focusing on advanced packaging materials and substrates, we are laying the groundwork for significant advancements in technology and manufacturing capabilities," stated EverGlade Managing Consultant, Stephen Richardson

The NAPMP seeks to accelerate domestic R&D, transform innovations into U.S. manufacturing capabilities, and establish a robust, sustainable domestic industry for advanced packaging materials and substrates. These efforts are not only crucial for enhancing U.S. economic and national security but also for ensuring a skilled and diverse workforce to support this vital industry.

"Our commitment to investing in domestic R&D and manufacturing is unwavering. The NAPMP initiative is a testament to our determination to secure the U.S.'s position as a global leader in the semiconductor sector, driving innovation and job creation across the nation," stated EverGlade Consulting Founder, Eric Jia-Sobota.

The application process for the NAPMP emphasizes two main components: the submission of concept papers and the invitation-based submission of full applications. Initially, applicants are required to submit concept papers by April 12, 2024 that outline their proposed research and development projects in advanced semiconductor packaging materials and substrates. Following a review of these concept papers, selected applicants will be invited to submit a full application by July 3, 2024, which entails a more detailed proposal including project plans, budgets, and potential impacts.

Silicon photonics: accelerating growth in the race for high-speed optical interconnects
CCD-in-CMOS technology enables ultra-fast burst mode imaging
2025 6G A look forward
Critical Manufacturing climbs Deloitte’s Technology Fast 50
Semiconductors: The most important thing you probably know the least about
Imec and partners unveil SWIR sensor with lead-free quantum dot photodiodes
Lattice introduces small and mid-range FPGA offerings
SEMI and SMT inspection solutions at NEPCON Japan 2025
Nordic Semiconductor and Kigen demonstrate Remote SIM Provisioning for Massive IoT
Spirent collaborates with Siemens
Quobly forges strategic collaboration with STMicroelectronics
New standards in pressure measurement systems for the semiconductor industry
IBM delivers optics breakthrough
Semiconductor equipment sales to reach $139 Billion in 2026
Marvell introduces 1.6 Tbps LPO Chipset
ACM research strengthens Atomic Layer Deposition portfolio
CEA-Leti demonstrates embedded FeRAM platform compatible with 22nm FD-SOI node
Lattice introduces small and mid-range FPGA offerings
Solace unlocks full potential of event-driven integration
Advantest to showcase latest test solutions at SEMICON Japan 2024
CEA-Leti device integrates light sensing and modulation
Nordic launches Thingy:91 X prototyping platform for cellular IoT and Wi-Fi locationing
Imec achieves seamless InP Chiplet integration on 300mm RF Silicon Interposer
High-precision SMU
Powering India’s energy future
China’s Nvidia probe puts global investors ‘on notice’
POET Technologies appoints new director
Imec demonstrates core building blocks of a scalable, CMOS-fab compatible superconducting digital technology
Imec proposes double-row CFET for the A7 technology node
ULVAC launches new deposition system
Beebolt and SEMI Announce Strategic Partnership to Drive Supplier Resilience and Agility
esmo group introduces Automated Final Test Manipulator
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
x
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: