Loading...
News Article

Laser Thermal awarded DoD contract

News

Under the STTR contract award, the program will develop technology for advanced metrology of high thermal conductivity materials and interfaces.

Laser Thermal has been awarded a Department of Defense Phase I STTR contract. The contract will fund the development of advanced thermal metrology technology for use with high thermal conductivity materials and interfaces. The Phase I program period of performance is six months with an additional six-month option extending until February 2025.

In the microelectronics industry, WBG and UWBG materials and devices include high thermal conductivity materials and interfaces with pertinent resistances spanning nano to sub-millimeter length scales. Characterization of these materials with a single platform is challenging and there are limited available commercial options. Most methods require a high degree of user knowledge in advanced optics and physics, for both instrumentation and analysis, and are traditionally only housed in academic institutions and national labs. The current and next generation of horizontal and vertical high-power devices and packages will benefit from commercially viable measurement systems to characterize:

· High-thermal conductivity materials

· Thermal interface resistances

· Sub-surface films, interfaces, heat sinks, etc

· Temperature dependent properties

· Spatially varying thermal resistances with areal length scales on the order of contacts and depth resolution on order of device layers

· Measurements in operando

Dr. Jeffrey Braun, Principal Investigator for the program and VP of Strategy and Programs at Laser Thermal, expressed the significance of this Phase I award, stating, "We are honored to be selected and awarded this program by OSD Basic Research Office and we are committed to our development of innovative technologies to address existing and emerging microelectronics thermal challenges.”

The results of the OSD BRO STTR program will enable design and manufacture of a high-power density steady state thermoreflectance (SSTR) tool for high thermal conductivity materials such as isotopically pure diamond. It will have integrated temperature testing and electrical probing for temperature dependent property measurement and testing of devices in operando. The new high-power SSTR system will enable variable depth sensitivity, spatial mapping and automated thermal property fitting across these temperature and applied external field capabilities. The new tool will dramatically increase customer ease of use for both data acquisition and, particularly, data analysis, allowing users to understand the most important use cases for temperature testing, electrical biasing, and thermal mapping.

Silicon photonics: accelerating growth in the race for high-speed optical interconnects
CCD-in-CMOS technology enables ultra-fast burst mode imaging
2025 6G A look forward
Critical Manufacturing climbs Deloitte’s Technology Fast 50
Semiconductors: The most important thing you probably know the least about
Imec and partners unveil SWIR sensor with lead-free quantum dot photodiodes
Lattice introduces small and mid-range FPGA offerings
SEMI and SMT inspection solutions at NEPCON Japan 2025
Nordic Semiconductor and Kigen demonstrate Remote SIM Provisioning for Massive IoT
Spirent collaborates with Siemens
Quobly forges strategic collaboration with STMicroelectronics
New standards in pressure measurement systems for the semiconductor industry
IBM delivers optics breakthrough
Semiconductor equipment sales to reach $139 Billion in 2026
Marvell introduces 1.6 Tbps LPO Chipset
ACM research strengthens Atomic Layer Deposition portfolio
CEA-Leti demonstrates embedded FeRAM platform compatible with 22nm FD-SOI node
Lattice introduces small and mid-range FPGA offerings
Solace unlocks full potential of event-driven integration
Advantest to showcase latest test solutions at SEMICON Japan 2024
CEA-Leti device integrates light sensing and modulation
Nordic launches Thingy:91 X prototyping platform for cellular IoT and Wi-Fi locationing
Imec achieves seamless InP Chiplet integration on 300mm RF Silicon Interposer
High-precision SMU
Powering India’s energy future
China’s Nvidia probe puts global investors ‘on notice’
POET Technologies appoints new director
Imec demonstrates core building blocks of a scalable, CMOS-fab compatible superconducting digital technology
Imec proposes double-row CFET for the A7 technology node
ULVAC launches new deposition system
Beebolt and SEMI Announce Strategic Partnership to Drive Supplier Resilience and Agility
esmo group introduces Automated Final Test Manipulator
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
x
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: