New bonded door seals with Kalrez® perfluoroelastomer parts from DuPont Dow Elastomers make wafer processing more productive. Presented by DuPont Dow at Semicon Europa 2004 (stand B1.276) these seals are designed for etch, ash, HDPCVD, PECVD, SACVD and metal CVD wafer processing and outperform conventional O-rings in slit and gate valve door seal applications.
For more details: www.kalrez.com/bonded
DuPont Dow Elastomers S.A.
2, chemin du Pavillon
CH-1218 Le Grand-Saconnex
Tel: ++41 22 717 4000
Fax: ++41 22 717 4001
Kalrez® is a registered trademark of DuPont Dow Elastomers
SUSS MicroTec says that it has developed a system that can for the first time carry out analytical probing of test structures as small as 30x30microns. MicroAlign is designed to meet the needs of wafer-level reliability test structures. These structures are put in the "kerf" area between the chips that is destroyed during the wafer sawing process.
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Philips Electronics, Sony and E Ink claim the world's first consumer application of an electronic paper display module in Sony's new e-Book reader, LIBRIe, scheduled to go on sale in Japan in late April 2004. The Philips' display uses E Ink's electronic ink technology to offer a paper-like display with a contrast level similar to newsprint.
Trikon Technologies announced successful completion of the Semiconductor Equipment Association (SEA) Advanced CVD Tool for Integration of Organosilicate Nanoporous Films (ACTION) project based at the Crolles II alliance development facility in France.
The Fraunhofer Institute for Microelectronic Circuits and Systems (IMS) organisation in Germany has set up a CMOS production line in Duisburg for the ZigBee wireless standard. Fraunhofer says that the bandwidth offered by alternative standards such as Bluetooth exceed what many devices need and that the power consumption is also more than necessary.
Scientists at IBM's TJ Watson Research Center have developed a high-mobility ultrathin semiconducting film prepared by spin coating (Nature, March 18, 2004). The technique promises simple, low-cost products. The researchers have boosted electron mobilities by about 10 times over that reported for all other similar approaches.
The European Commission approved aid for the Infineon’s DRAM packaging and final test facility in Vila do Conde, Grande Porto, Portugal. The Infineon Portugal plant is the only back-end unit in the DRAM production sector in Europe.
Scientists in Berlin are seeking to commercialise technology designed to improve the growth efficiency of epitaxially produced quantum dot (QD) semiconductor elements such as laser diodes. The new technology significantly reduces electrical losses and optical scattering losses of the resulting semiconductor devices, reducing energy consumption.
Infineon Technologies is to buy the 13% minority holding in the Infineon Technologies SC300 fab in Dresden, Germany, owned by Leipziger Messe and SC 300 Beteiligungs for approximately EUR278mn. The acquisition will be financed through increasing Infineon’s capital by approximately 27mn new shares through a capital increase in kind.
French company 40-30 has acquired Incam Solutions, a spin off from the LETI French microelectronics R&D centre based in Grenoble, France, founded in 1997. Incam’s front opening unified pod (FOUP) products are dedicated to single wafer applications with the FFO (FOUP For One). The technology is protected by international patents.
Hymite has closed a second financing round totalling EUR9.7mn (DKK72.3mn). The company is developing hermetic and non-hermetic assembly and encapsulation micro-housing technologies for semiconductors, optical and micro-electro-mechanical system (MEMS) devices.
Unitive has developed and qualified an electroplated lead-free bumping technology. Upon completing internal qualification, UST also achieved production qualification status for Infineon Technologies. The SnAg lead-free solution enables replacement of eutectic solder with a lead-free solder.
The European Commission (EC) has approved R&D aid for Altis Semiconductor based in France. The aid is intended to help set up a "HyperSoc" research centre for the design and development of 120-90nm non-volatile magnetic memory with copper interconnects. The company hopes to develop a new generation of on-chip magnetic memory for use in computers, mobile communications, card products or other applications.
German deposition equipment supplier Aixtron will install a 200/300mm multi-chamber Tricent platform in IMEC's 300mm cleanroom for Atomic Vapour Deposition (AVD) of advanced CMOS gate stacks. Aixtron is also joining IMEC's sub-45nm research platform as an equipment partner. Among the applications where Aixtron’s technology could be helpful is deposition of high-k gate oxide replacments and metal gate electrodes.
Applied Materials and Soitec have agreed to jointly develop advanced germanium-on-insulator (GeOI) and other related critical Ge-based processes designed to significantly enhance transistor performance at the 45nm and beyond technology nodes. The companies will combine Soitec's Smart Cut and engineered substrate expertise with the epitaxial deposition capabilities of the Applied’s Centura reduced pressure (RP) epitaxial deposition system.
The European Commission NANOCMOS project began March 1, 2004, to push the semiconductor industry to 45nm production and beyond. The first phase is for 27months up to June 2006. The next phase will need European Commission and MEDEA+ approval and calls for participation are expected to begin in mid-2005 for a start in 2006.
Matsushita Electric Industrial (MEI) has joined IMEC’s sub-45nm research platform as a core partner. In 2003, the European research centre launched the centralised research platform to develop sub-45nm process technologies in line with the semiconductor technology roadmap. This research platform is designed to allow companies to collaborate during the research phase and reduce individual risk and costs, while deriving results more quickly by working together in a state-of-the-art facility. The research targets technology generations two to three nodes ahead of state-of-the-art IC production.
Philips Electronics is to extend its access to IMEC’s research facilities and expertise until the end of 2008. Philips Research’s Leuven organisation plans further joint research with IMEC on specialised semiconductor processes and advanced CMOS technologies in preparation for continued process development with Philips’ Crolles2 Alliance partners, STMicroelectronics and Motorola.
Three labs (metrology, electronics and micro-engineering ) from the Ecole Polytechnique Federale de Lausanne (EPFL) in Switzerland have jointly realised a device integrating both optics (waveguides, interferometer) and CMOS electronics on a silicon-on-insulator (SOI) substrate. Only one extra mask and etch process was need to produce the device.
The BAOBERLIN research group in Germany has invented a novel contact structure for electric II-VI semiconductor components such as blue-green laser diodes. The new structure is designed to significantly reduce the troublesome large contact resistance commonly hindering II-VI work.
PolyApply is a four-year research project launched by the European Commission under its 6th Research, Technological development and Demonstration Framework Programme. The aim is to lay the foundations of a scalable and ubiquitously applicable communication technology that will make ‘ambient intelligence’ commercially viable through the use of low-cost, polymer-based electronic circuits.
PVA TePla’s Crystal Growing Systems division has successfully implemented the first commercially available production vertical gradient freeze (VGF) crystal growing system at Freiberger Compound Materials (FCM), a leading manufacturer of gallium arsenide and other compound semiconductor wafers.