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Friday 27th June 2003
Micronas introduced what it calls "ActivePackage" – aimed at ridding a headache car manufacturers worldwide have shared for many years. During the life cycle of a car, several of the original integrated circuits (IC) that are designed in when the car is launched become obsolete - forcing car manufacturers to carry out expensive redesigns.
Friday 27th June 2003
Surface Technology Systems (STS) unveiled its Pro family of plasma etch and deposition tools aimed at the transition from the "technology driven" era of micro-electro-mechanical system (MEMS) technology into volume production.
Friday 27th June 2003
Schlumberger announced that certain of its subsidiaries have signed a definitive agreement with a partnership led by Francisco Partners and Shah Management for the sale of the NPTest business unit.
Friday 27th June 2003
Oxford University is looking for partners to help it commercialise a simple treatment technique for purifying crude samples of single and multi-walled carbon nanotubes (SW and MW-CNTs) to produce a clean, well dispersed product currently containing greater than 90% semiconducting CNTs.
Friday 27th June 2003
X-FAB Semiconductor Foundries announced an expansion of its MEMS product line to include surface micromachining technology for absolute pressure sensors. The technology enables integration of absolute pressure sensors with X-FAB's CMOS technologies. The sensors can also be implemented as discrete components.
Tuesday 24th June 2003
The Taiwanese government has approved funding to set up a new innovative R&D Center for intense production-oriented technology transfer in Taiwan.
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Tuesday 24th June 2003
BTG is to co-operate with Atmel on developing a UHF RFID ISO 18000-6 type A chip.
Tuesday 24th June 2003
ST Assembly Test Services (STATS) has qualified a “total” system-in-package (SiP) solution for PBGA, stPBGA and LGA packages along with surface mount manufacturing capability.
Tuesday 24th June 2003
ON Semiconductor has signed a multi-year, renewable agreement establishing Hynix as a volume supplier of CMOS manufacturing services.
Tuesday 24th June 2003
PDF Solutions has signed a definitive agreement to acquire IDS Software Systems based in California.
Tuesday 24th June 2003
The new Pro generation of equipment platforms from Surface Technology Systems drives down the cost-per-die for single wafer plasma processes across a wide range of applications. The platforms are available with the full compliment of STS' well-established plasma etch and deposition sources in loadlocked or cluster format. The Pro range delivers a compact footprint, with the latest generation of PLC-based control system providing enhanced communications, reliability and functionality coupled with faster and simpler maintenance operations. An improved user interface, conforming to SEMI E95 further improves the intuitive look and feel of the systems. For MEMS silicon micromachining applications etch rates of up to 20 microns/min are available, and for optical devices, sidewall smoothness of 20nm are reproducibly demonstrated. A new showerhead design for PECVD processes delivers exceptional deposition rates and uniformity. For example, for optical waveguide applications, 7800 angstroms/min for BPSG clad and 4500 angstroms/min for Ge-doped silica core layers. Greater yields, reduced cleaning and minimal consumable parts combine to reduce further the cost-per-die for both etch and deposition processes. For further information, click http://www.stsystems.com/latest_news/Pro_news5.html, or Email: enquiries@stsystems.co.uk Surface Technology Systems plc, Newport, NP10 8UJ, UK tel. +44 1633 652400 www.stsystems.com.
Tuesday 24th June 2003
FOR A NUMBER OF YEARS THERE HAS BEEN INDUSTRY DISCUSSION ON THE MERITS OF SINGLE WAFER PROCESSING AS OPPOSED TO BATCH WAFER PROCESSING. ALTHOUGH THE BATTLE CONTINUES EARLY ANALYSIS SUGGEST SINGLE WAFER PROCESSING MAY BE FASTER OVERALL. HEINZ OYRER, DIRECTOR OF STRATEGIC MARKETING AT SEZ DISCUSSES THE BENEFITS OF THE NEW RANGE OF SINGLE WAFER CLEANERS TO COME FROM SEZ AND HOW THEY WILL UP THE ANTE FOR SINGLE WAFER PROCESSING.  
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Saturday 21st June 2003
scott test
Saturday 21st June 2003
scott test
Tuesday 17th June 2003
Technology Innovations LLC and Innovation On Demand Inc. have been issued a US patent for a "Wireless Technique for Microactivation" (No.6,588,208). The patent covers microactuators that can be operated wirelessly by focused beams of energy, enabling the devices to control objects in the 100nm range.
Monday 16th June 2003
IBM and Infineon Technologies have succeeded in integrating 128kbit magnetic memory (MRAM) components into a high-performance logic base.
Monday 16th June 2003
German company Lotus Systems won the European Semiconductor/Wacker Siltronic Start-up award for 2003.
Monday 16th June 2003
Advanced Control Research (ACR) is developing a new microchip system designed to give prosthetic arm users more movement and control from artificial limbs.
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Monday 16th June 2003
A number of companies released details of contributions to the VLSI Symposium this week in Japan.
Monday 16th June 2003
Legeritys flagship proprietary HV7high-voltage process completed qualification after only 9 months for production at Chartered Semiconductor Manufacturing in Singapore.
Friday 13th June 2003
DEK and PacTech USA have formed a solder bump technology partnership. By combining PacTech’s electroless under bump metallisation (UBM) processing with DEK’s mass imaging systems to create solder bumps, users can implement a wafer-level, SMT-compatible flip chip assembly process.
Friday 13th June 2003
UK distributor Anders Electronics will be marketing in Europe flexible, plastic, electronic character displays based on a development by Citala, an Israel-based display specialist.
Friday 13th June 2003
Toshiba has developed and verified the operability of a memory cell technology for embedded DRAM system LSIs on silicon-on-insulator (SOI) wafers, claimed as a world first. Toshiba aims to apply the new technology to mass production of system LSIs for broadband network applications in 2006. Toshiba has experimentally fabricated a 96kbit cell array. Full details of the new technology were presented at the VLSI Symposium in Kyoto, Japan.
Friday 13th June 2003
Toshiba has developed and verified the operability of a memory cell technology for embedded DRAM system LSIs on silicon-on-insulator (SOI) wafers, claimed as a world first. Toshiba aims to apply the new technology to mass production of system LSIs for broadband network applications in 2006. Toshiba has experimentally fabricated a 96kbit cell array. Full details of the new technology were presented at the VLSI Symposium in Kyoto, Japan.

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