CEA-LETI to showcase breakthroughs at IEDM
Leti, a technology research institute of CEA Tech, will present its breakthroughs on embedded memories & AI, RF, quantum computing, and energy storage during IEDM 2019 at the Hilton San Francisco Union Square hotel, Dec. 7-11, and will co-host a workshop with imec titled “Towards Next Generation Computing”.
In addition, CEA-Leti, a global leader in 3D integration technology, which includes its patented CoolCubeTM process, will present a tutorial on sequential integration, at 4:30 p.m., Dec. 7.
The institute also will host for the first time a joint workshop with imec. The event organized by two of the world’s leading microtechnology research organizations features an introduction by Stanford University Prof. Subhasish Mitra, “Computing for the Coming Superstorm of Abundant Data”. It will begin with registration at 5:30 p.m. on Dec. 8. In addition to Mitra’s presentation and brief introductions and conclusions by imec President and CEO Luc Van den hove and Leti CEO Emmanuel Sabonnadière, the workshop sessions are:
Artificial Intelligence
• In-memory Computing Technologies for DNN Acceleration, imec
• Technological Solutions for Improving the Figures of Merit of Edge AI, Leti
Quantum Computing
• Si Spin Qubit Challenges for Large Scale, Leti
• Disruption in Compute: Building the Quantum Computer in a 300mm Fab, imec
IEDM Conference Highlights
Conclusion followed by a reception
“The joint workshop with CEA-Leti and imec further signals Europe’s drive to leverage its complementary microelectronics expertise and passion for innovation, and position itself as a leader in the global pursuit of essential technologies for the future,” said Sabonnadière. “This drive is based on our commitment to not only create breakthroughs, but also to transfer them to Europe’s industrials, SMEs and startups, which will bring essential technologies to people around the world.”
CEA-Leti and Partners’ IEDM Papers by Research Category
Embedded Memories and AI
“Fully Integrated Spiking Neural Network with Analog Neurons and RRAM Synapses”
14.3, 9:55 AM, Dec. 10, Continental Ballroom 5
“Demonstration of BEOL-Compatible Ferroelectric Scaled Hf0.5Zr0.5O2 FeRAM Co-Integrated with 130nm CMOS for Embedded NVM Applications”
15.7, 12:00 PM, Dec. 10, Continental Ballroom 6
“Reliability and Variability of 1S1R OxRAM-OTS for High Density Crossbar Integration”
35.3, 2:25 PM, Dec.11, Grand Ballroom A
RF
“RF Performance of a Fully Integrated 3D Sequential Technology”
25.1, 2:20 PM, Dec. 10, Imperial Ballroom A
• “A Very Robust and Reliable 2.7GHz +31dBm Si RFSOI Transistor for Power Amplifier Solutions”
25.5, 4:25 PM, Dec.10, Imperial Ballroom A
Quantum Computing
• “Gate Reflectometry for Probing Charge and Spin States in Linear Si MOS Split-gate Arrays”
37.7, 4:05 PM, Dec.11, Continental Ballroom 4
Energy Storage
• “Millimeter Scale Thin Film Batteries for Integrated High Energy Density Storage”
26.1, 2:20 p.m., Dec. 10, Imperial Ballroom B
Invited Papers
• “Hybrid Analog-Digital Learning with Differential RRAM Synapses”
22.6, 4:50, Dec. 10, Continental Ballroom 5
• “OXRAM for Embedded Solutions on Advanced Node: Scaling Perspectives Considering Statistical Reliability and Design Constraints”
30.5, 10:45, Dec.11, Continental Ballroom 4
• “Qubit Read-out in Semiconductor Quantum Processors: Challenges and Perspectives”
31.6, 11:10 AM, Dec. 11, Continental Ballroom 5
Other Papers
Monday, Dec. 9
• “Inter-tier Dynamic Coupling and RF Crosstalk in 3D Sequential Integration”
3.4, 3:40 PM, Grand Ballroom B
• “Investigation of nBTI degradation on GaN-on-Si E-mode MOSc-HEMT”
4.3, 2:25 PM, Continental Ballroom 1-3
Tuesday, Dec. 10
• “Imaging, Modeling and Engineering of Strain in Gate-All-Around Nanosheet Transistors”
11.5, 11:10 AM, Grand Ballroom A
• “A Large-area Curved Pyroelectric Fingerprint Sensor”
26.5, 4:25 PM, Imperial Ballroom B
Wednesday, Dec. 11
• “First Demonstration of Vertical Ge0.92Sn0.08/Ge and Ge GAA Nanowire pMOSFETs with Low SS of 66 mV/dec and Small DIBL of 35 mV/V”
29.6, 11:10 AM, Grand Ballroom B
• “Novel 1T2R1T RRAM-based Ternary Content Addressable Memory for Large Scale Pattern Recognition”
35.5, 3:15 PM, Grand Ballroom A
