News Article
GLOBALFOUNDRIES 12LP+ FinFET Solution Ready for Production
GLOBALFOUNDRIES (GF), a specialty foundry, has announced its most advanced FinFET solution, 12LP+, has completed technology qualification and is ready for production.
GF’s differentiated 12LP+ solution is optimized for artificial intelligence (AI) training and inference applications. Built on a proven platform with a robust production ecosystem, 12LP+ offers chip designers an efficient development experience and a fast time-to-market.
Contributing to its best-in-class combination of performance, power and area, 12LP+ introduces new features including an updated standard cell library, an interposer for 2.5D packaging, and a low-power 0.5V Vmin SRAM bitcell that supports the low latency and power-efficient shuttling of data between the AI processors and memory. The result is a semiconductor solution engineered to meet the specific needs of the fast-growing AI market.
“Artificial intelligence is on a trajectory to become the most disruptive technology of our lifetime,” said Amir Faintuch, senior vice president and general manager of Computing and Wired Infrastructure at GF. “It is increasingly clear that the power efficiency of AI systems – in particular how many operations you can wrest from a watt of power – will be among the most critical factors a company considers when deciding to invest in data centers or edge AI applications. Our new 12LP+ solution tackles this challenge head-on. It has been engineered and optimized, obsessively so, with AI in mind.”
12LP+ builds upon GF’s established 14nm/12LP platform, of which GF has shipped more than one million wafers. GF’s 12LP is being used by companies including Enflame, Tenstorrent, and others for AI accelerator applications. By partnering closely and learning from AI clients, GF developed 12LP+ to provide greater differentiation and increased value for designers in the AI space while minimizing their development and production costs.
Driving the enhanced performance of 12LP+ are features including a 20-percent SoC-level logic performance boost over 12LP, and a 10-percent improvement in logic area scaling. These advancements are achieved in 12LP+ through its next-generation standard cell library with performance-driven area optimized components, single Fin cells, a new low-voltage SRAM bitcell, and improved analog layout design rules.
12LP+, a specialized application solution, is augmented by GF’s AI design reference package, as well as GF’s co-development, packaging, and post-fab turnkey services – which together enable a holistic experience for designing low-power, cost-effective circuits optimized for AI applications. Close collaboration between GF and its ecosystem partners results in cost-effective development costs and a quicker time to market.
In addition to 12LP’s existing IP portfolio, GF will expand the IP validations for 12LP+ to include PCIe 3/4/5 and USB 2/3 to host processors, HBM2/2e, DDR/LPDDR4/4x and GDDR6 to external memory, and chip-to-chip interconnect for designers and clients pursuing chiplet architectures.
GFs’ 12LP+ solution has been qualified and is currently ready for production at GF’s Fab 8 in Malta, New York. Several 12LP+ tape-outs are scheduled for the second half of 2020. GF recently announced it would bring its Fab 8 facility into compliance with both the U.S. International Traffic in Arms Regulations (ITAR) standards and the Export Administration Regulations (EAR). These new control assurances, which will go into effect later this year, will make confidentiality and integrity protections available for defense-related applications, devices, or components manufactured at Fab 8.
Contributing to its best-in-class combination of performance, power and area, 12LP+ introduces new features including an updated standard cell library, an interposer for 2.5D packaging, and a low-power 0.5V Vmin SRAM bitcell that supports the low latency and power-efficient shuttling of data between the AI processors and memory. The result is a semiconductor solution engineered to meet the specific needs of the fast-growing AI market.
“Artificial intelligence is on a trajectory to become the most disruptive technology of our lifetime,” said Amir Faintuch, senior vice president and general manager of Computing and Wired Infrastructure at GF. “It is increasingly clear that the power efficiency of AI systems – in particular how many operations you can wrest from a watt of power – will be among the most critical factors a company considers when deciding to invest in data centers or edge AI applications. Our new 12LP+ solution tackles this challenge head-on. It has been engineered and optimized, obsessively so, with AI in mind.”
12LP+ builds upon GF’s established 14nm/12LP platform, of which GF has shipped more than one million wafers. GF’s 12LP is being used by companies including Enflame, Tenstorrent, and others for AI accelerator applications. By partnering closely and learning from AI clients, GF developed 12LP+ to provide greater differentiation and increased value for designers in the AI space while minimizing their development and production costs.
Driving the enhanced performance of 12LP+ are features including a 20-percent SoC-level logic performance boost over 12LP, and a 10-percent improvement in logic area scaling. These advancements are achieved in 12LP+ through its next-generation standard cell library with performance-driven area optimized components, single Fin cells, a new low-voltage SRAM bitcell, and improved analog layout design rules.
12LP+, a specialized application solution, is augmented by GF’s AI design reference package, as well as GF’s co-development, packaging, and post-fab turnkey services – which together enable a holistic experience for designing low-power, cost-effective circuits optimized for AI applications. Close collaboration between GF and its ecosystem partners results in cost-effective development costs and a quicker time to market.
In addition to 12LP’s existing IP portfolio, GF will expand the IP validations for 12LP+ to include PCIe 3/4/5 and USB 2/3 to host processors, HBM2/2e, DDR/LPDDR4/4x and GDDR6 to external memory, and chip-to-chip interconnect for designers and clients pursuing chiplet architectures.
GFs’ 12LP+ solution has been qualified and is currently ready for production at GF’s Fab 8 in Malta, New York. Several 12LP+ tape-outs are scheduled for the second half of 2020. GF recently announced it would bring its Fab 8 facility into compliance with both the U.S. International Traffic in Arms Regulations (ITAR) standards and the Export Administration Regulations (EAR). These new control assurances, which will go into effect later this year, will make confidentiality and integrity protections available for defense-related applications, devices, or components manufactured at Fab 8.
