+44 (0)24 7671 8970
More publications     •     Advertise with us     •     Contact us
 
News Article

Mentor and Tezzaron enhance 3DSTACK for 2.5 & 3D-ICs

News


Mentor Graphics and Tezzaron Semiconductor are collaborating to integrate the Mentor Calibre 3DSTACK product into Tezzaron's 3D-IC offerings.

The new integration will focus on fast, automated verification of die-to-die interactions in 2.5D and 3D stacked die configurations by verifying individual dies in the usual manner, while verifying die-to-die interfaces in a separate procedure with specialized automation features. The two companies plan to extend their collaboration to include development of solutions for the silicon photonics market.

"Tezzaron specialises in 3D wafer stacking and TSV processes. We work with dozens of customers to create custom 3D-ICs for prototyping and commercialisation, including recent 3D-ICs in 40 nm and 65 nm, the first at these small nodes," says Robert Patti, CTO and VP of design engineering at Tezzaron Semiconductor.

"By collaborating with Mentor Graphics, we can offer our mutual customers a comprehensive design verification solution. It creates the highest value for them with the least disruption to their existing flows. Using Calibre, our customers get the best possible turnaround time. Even better, there is no need to generate a "˜Frankenstein' GDS file combining all the individual dies in a 3D-IC assembly, and no need to deal with a "˜monster' rule file combining different die processes. Calibre makes the process very fast and relatively easy," continues Patti.

Tezzaron works with industry, academia, and government to create advanced 3D-ICs. The firm's offerings include wafer stacking and die stacking technology with TSVs, Bi-STAR built in self-test and repair circuitry for continuous error detection and recovery, and extremely fast memory devices for both standalone and stacked applications.

 Complementing Tezzaron's 3D-IC design capabilities, the Calibre 3DSTACK signoff solution provides DRC, LVS, and parasitic extraction (PEX) capabilities. It verifies physical offset, rotation, and scaling at the die interfaces. It also enables connectivity tracing and extraction of interface parasitic elements needed for multi-die performance simulation.

The Calibre 3DSTACK product is a fully compatible extension to the standard Calibre signoff platform, so it can be easily added to existing verification flows to support flexible stacking configurations of multiple dies, including dies based on different technologies or process nodes.

"Over the last two years, the relationship between Mentor Graphics and Tezzaron has really blossomed as we work together to bring volume 3D-IC applications to the IC industry mainstream," says Michael Buehler-Garcia, senior director of marketing for Calibre Design Solutions at Mentor Graphics. "Combining flexibility, ease-of-use, and interoperability provides the highest value for our mutual customers, and will help make the adoption of 3D-IC design techniques successful."

Tezzaron Semiconductor Corporation is a designer and manufacturer of 3D-ICs built with through-silicon vias (TSVs). Tezzaron also builds patented ultra-high-speed memory products. The firm's products and technologies have applications in defence, super-computing, high speed telecommunications, and anywhere that speed, reliability, and power optimization are needed.

Mentor Graphics Corporation produces electronic hardware and software design solutions, providing products, consulting services and award-winning support for successful electronic, semiconductor and systems companies.


Purdue, imec, Indiana announce partnership
Resilinc partners with SEMI on supply chain resilience
NIO and NXP collaborate on 4D imaging radar deployment
Panasonic Industry digitally transforms with Blue Yonder
Global semiconductor sales decrease 8.7%
MIT engineers “grow” atomically thin transistors on top of computer chips
Keysight joins TSMC Open Innovation Platform 3DFabric Alliance
Leti Innovation Days to explore microelectronics’ transformational role
Quantum expansion
indie launches 'breakthrough' 120 GHz radar transceiver
Wafer fab equipment - facing uncertain times?
Renesas expands focus on India
Neuralink selects Takano Wafer Particle Measurement System
Micron reveals committee members
Avoiding unscheduled downtime in with Preventive Vacuum Service
NFC chip market size to surpass US$ 7.6 billion
Fujifilm breaks ground on new €30 million European expansion
Fraunhofer IIS/EAS selects Achronix embedded FPGAs
Siemens announces certifications for TSMC’s latest processes
EU Chips Act triggers further €7.4bn investment
ASE recognised for excellence by Texas Instruments
Atomera signs license agreement with STMicroelectronics
Gartner forecasts worldwide semiconductor revenue to decline 11% in 2023
CHIPS for America outlines vision for the National Semiconductor Technology Center
TSMC showcases new technology developments
Alphawave Semi showcases 3nm connectivity solutions
Greene Tweed to open new facility in Korea
Infineon enables next-generation automotive E/E architectures
Global AFM market to reach $861.5 million
Cepton expands proprietary chipset
Semtech adds two industry veterans to board of directors
Specialty gas expansion
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
×
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: