Alchimer & imec to advance sub-22nm interconnects
In an industry where finer features are driving market needs, current deposition processes are no longer sufficient to address challenges like interconnect dimensions below 16/14nm. Nor are they suitabke for high aspect ratio TSVs (> 8) without encountering defects, voids, or low reliability.
Beyond process performance, cost remains a critical consideration for manufacturing next-generation devices.
Addressing this issue, Alchimer is collaborating with imec to validate its wet deposition technology, which has demonstrated excellent performance at a considerably lower COO than competitive technologies.
Alchimer, S.A., is a provider of wet deposition technologies for dual damascene, through-siliconvias (TSVs), MEMS and the solar markets.
The joint project will target on implementing copper (Cu) filling solutions for advanced nano-interconnect technologies. The focus will be on Alchimer's Electrografting (eG) product family that has demonstrated void-free filling on 7nm node devices and allows direct Cu fill on barrier with no seed layer required for damascene processes.
As CMOS scaling creates finer features, market requirements for copper damascene include smaller dimensions (≤ 16/14 nm) with a thin barrier layer, and thin or no Cu seed layer. Filling processes must be defect/void free to meet reliability specifications, and achieve high yields.
Conventional physical vapour deposition (PVD) and chemical vapour deposition (CVD) processes are not meeting these requirements. Alchimer's wet deposition technologies are based on a molecular build-up process that breaks through the limitations of dry deposition processes.
"We believe that as the industry moves to smaller technology nodes, performance and cost will drive technology adoption," says Bruno Morel, CEO of Alchimer. "The performance of eG in advanced damascene applications, including single and dual damascene below 20nm, has been very promising both in terms of performance and cost of ownership. Collaborating with imec gives us access to tremendous resources to validate our technology's suitability at 300mm and understand what it would take to get ready for 450mm."
The goal of the JDP is to obtain reliability data and electrical performance for eG wet deposition processes in a 300mm manufacturing environment for sub-22nm technologies. As part of the JDP, the companies will assess the plating chemistry and work to identify the optimal process conditions for 300mm wafer-level advanced damascene plating applications.
About Achimer's eG Fill for Damascene Processes
eG Fill allows for direct copper filling on the barrier,eliminating the need for a seed layer. What's more, it has proven capable of void-free filling on 7nm node devices for improved yields and performance. Together, these result in very little terminal effect and excellent uniformity.
Apart fom being one of the only solutions that meets marketr equirements for advanced damascene structures, Alchimer's highly scalable wet approach decreases cost of ownership by 25-35 percent compared to conventional dry deposition processes.
This is achieved by minimising the use of costly PVD and CVD step processes, as the process can be performed on legacy tools that require minimal retrofitting. Ultra-conformal layers result in lower overburdens and stable chemistries are mixed on demand prior to use.
