MagnaChip and YMC offer 0.35µm and 0.18µm MTP-IP devices
MagnaChip Semiconductor Corporation a Korea-based designer and manufacturer of analogue and mixed-signal semiconductor products, is now offering 0.35µm and 0.18µm standard multiple-time programmable intellectual property (MTP-IP) devices jointly developed with Yield Microelectronics Corporation (YMC) of Taiwan.
The embedded MTP- IP solutions developed in MagnaChip's 0.35µm BCD process and 0.18µm BCD and mixed-signal process covers several standard memory cell sizes and is well suited for embedded applications such as Display, PMIC and LED controllers.
By adding YMC's MTP-IP to MagnaChip's existing NVM (non-volatile memory) portfolio, MagnaChip can provide enhanced foundry services to its global customers who stand to benefit from an IC design that incorporates next generation, low current embedded NVM performance.
This new MTP-IP solution provides high performance and reliability for the most stringent customer applications and covers a wide range of multiple-time programmable memory densities needed in the market.
Namkyu Park, Senior Vice President of Foundry Marketing for MagnaChip's Semiconductor Manufacturing Services Division comments, "We are very pleased to have jointly developed this new MTP-IP with YMC, a leading IP solutions provider and MagnaChip partner in Taiwan. Our continued focus is to offer cost-effective, high-performance NVM solutions to meet the increasing application-specific needs of our BCD and mixed-signal foundry customers."
Lin Hsin-Chang, Vice President of YMC, says, "Through a unique patented technology of memory components and mode of operation, the silicon IP jointly developed with MagnaChip successfully passed rigorous verification and reliability testing."
"This high-performance, high-reliability embedded non-volatile memory solution is now available and targeted for use by power management, microcontroller, touch controller and many other chip suppliers. By using this jointly developed MTP-IP, customers can enhance their overall product performance by greatly improving chip functionality while also reducing costs by shrinking the chip size," he adds.
