Cadence wins two TSMC 'Customers' Choice Awards'
Cadence Design Systems, a global electronic design innovator, has received two Customers' Choice Awards for papers delivered at TSMC's recent Open Innovation Platform (OIP) Ecosystem Forum.
The papers were entitled, "Resistance, Pin Access and FinFET Parasitics," authored by Paul Cunningham, Rachid Salik, Hitendra Divecha and Rahul Deokar; and "16G Multi-Standard SerDes IP in TSMC's 16nm FinFET Process," authored by Eric Naviasky, Tom Wilson, Bob Salem and Jason Chen.
The awards were based on surveys completed by conference attendees.
"Our customers appreciate and benefit from the work Cadence is doing to help them bring their 16nm FinFET designs to market," said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division. "These technical papers demonstrate enabled solutions through our close collaboration to help leading innovators embrace TSMC's most advanced manufacturing processes."
The papers can be viewed and downloaded from TSMC Online.
Cadence previously announced that the company received three TSMC Partner of the Year awards at the OIP conference for work with TSMC on analogue/mixed signal IP, 16nm FinFET design infrastructure, and 3D-IC design solutions.
