+44 (0)24 7671 8970
More publications     •     Advertise with us     •     Contact us
 
News Article

Squeezing transistors really hard saves energy

News

Sandwiching a piezoelectric material between silicon layers in a transistor means that the device is only put under pressure when necessary

Transistors, the workhorses of the electronics world, are plagued by leakage current. This results in unnecessary energy losses, which is why smartphones and laptops, for example, have to be recharged so often.

Tom van Hemert and Ray Hueting of the University of Twente's MESA+ Institute for Nanotechnology have shown that this leakage current can be radically reduced by "squeezing" the transistor with a piezoelectric material (which expands or contracts when an electrical charge is applied to it). Using this approach, they have smashed the theoretical limit for leakage current.

If silicon is squeezed, this affects the freedom of movement of the electrons in this material. This can promote or restrict the flow of electrical current. Compare it to a garden hose. When you stand on it, less water comes out. But strangely enough, the flow of electrons in silicon actually increases when the material is compressed.

Only pinch when necessary

In modern microchips, every single transistor is continuously exposed to enormous pressures of up to 10,000 atmospheres. This pressure is sealed in during the manufacturing process, by surrounding the transistors with compressive materials.

While this boosts the chip's processing speed, the leakage current also increases. The use of piezoelectric material means that the transistors are only put under pressure when this is necessary. This can generate considerable savings in terms of energy consumption.

The electrical current passing through a transistor is conducted by a slice of silicon.

The schematic at the top if this story shows the new transistor, where the silicon slice is sandwiched between layers of piezoelectric material. As this material (shown in red) expands, the silicon (shown in blue) is compressed.

Limit smashed

The underlying concept was originally developed by Ray Hueting. In order to turn this into reality, Tom van Hemert had to find a way of linking theories of mechanical deformation with quantum-mechanical formulas describing the electrical behaviour of transistors.

The calculations indicate that "garden hose transistors" are much better than conventional transistors at switching from off to on. According to the classical theoretical limit, a charge of at least 60 millivolts is needed to make a transistor conduct ten times more electricity.

The piezoelectric transistor uses just 50 millivolts. As a result, either the leakage current can be reduced, or more current can be carried in the on-state. Either way, this will boost the performance of modern microchips, while - importantly - cutting their energy consumption.

The results of this research were recently published in the paper, "Piezoelectric Strain Modulation in FETs," by Tom van Hemert et al, Transactions on Electron Devices, IEEE Transactions on Electron Devices, 60 (10) :3265-3270. DOI:10.1109/TED.2013.2274817

Purdue, imec, Indiana announce partnership
Resilinc partners with SEMI on supply chain resilience
NIO and NXP collaborate on 4D imaging radar deployment
Panasonic Industry digitally transforms with Blue Yonder
Global semiconductor sales decrease 8.7%
MIT engineers “grow” atomically thin transistors on top of computer chips
Keysight joins TSMC Open Innovation Platform 3DFabric Alliance
Leti Innovation Days to explore microelectronics’ transformational role
Quantum expansion
indie launches 'breakthrough' 120 GHz radar transceiver
Wafer fab equipment - facing uncertain times?
Renesas expands focus on India
Neuralink selects Takano Wafer Particle Measurement System
Micron reveals committee members
Avoiding unscheduled downtime in with Preventive Vacuum Service
NFC chip market size to surpass US$ 7.6 billion
Fujifilm breaks ground on new €30 million European expansion
Fraunhofer IIS/EAS selects Achronix embedded FPGAs
Siemens announces certifications for TSMC’s latest processes
EU Chips Act triggers further €7.4bn investment
ASE recognised for excellence by Texas Instruments
Atomera signs license agreement with STMicroelectronics
Gartner forecasts worldwide semiconductor revenue to decline 11% in 2023
CHIPS for America outlines vision for the National Semiconductor Technology Center
TSMC showcases new technology developments
Alphawave Semi showcases 3nm connectivity solutions
Greene Tweed to open new facility in Korea
Infineon enables next-generation automotive E/E architectures
Global AFM market to reach $861.5 million
Cepton expands proprietary chipset
Semtech adds two industry veterans to board of directors
Specialty gas expansion
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
×
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: