+44 (0)24 7671 8970
More publications     •     Advertise with us     •     Contact us
 
News Article

Alliance orders EVG tool for SOI wafer bonding

News

SMART Low Energy Electronic Systems Group will leverage the EVG 850LT in advanced compound semiconductor research for wireless ICs, power electronics, LEDs and other application

MIT Alliance for Research Technology (SMART) has ordered an EVG 850LT fully automated production bonding system designed for silicon-on-insulator (SOI) and direct wafer bonding using low-temp plasma activation processing. 

SMART, which is a research centre established by the Massachusetts Institute of Technology (MIT) in partnership with the National Research Foundation of Singapore, will utilise the EVG850LT system to support its advanced substrate development efforts.

The MIT research centre is located outside the United States in Singapore and has five different research groups, including the Low Energy Electronic Systems (LEES) Research Group, which focuses on integrating silicon CMOS and compound semiconductor materials to enable new integrated circuits (ICs) for wireless devices, power electronics, LEDs, displays and other applications. 

The LEES Research Group features a facility, where the EVG850LT has already been installed and is in use.

According to Professor Eugene Fitzgerald from MIT's Department of Materials Science and Engineering, SMART chose the EVG850LT for the centre's advanced R&D efforts due to the system's high process flexibility and performance, EVG's experience in low-temperature bonding, and expertise and support in process development. 

"The charter of our LEES Research Group is to identify new IC technologies that enable devices that consume less power, enable higher performance and open up new applications for information systems. EV Group's technology and expertise will play an important role in supporting this effort," states Fitzgerald.

The EVG850 platform, upon which the EVG850LT system is built, is the only SOI and direct wafer bonding platform designed to operate in high-throughput, high-yield environments"”establishing it as the industry standard in the SOI wafer bonding market. 

The EVG850LT platform combines all essential steps for wafer bonding"”from cleaning and alignment to pre-bonding and IR-inspection- in a single platform. 

This ensures an ultra-clean production process throughout all stages to enable high-yield, void-free wafers, as opposed to stand-alone processing units that require the wafers to be manually transported in a regular cleanroom environment. 

The EVG850 supports a variety of advanced substrates, including SOI and silicon on lattice engineered substrate (SOLES) technology, up to 300 mm in diameter. 

"EVG has been at the forefront of SOI technology development for more than 20 years, and has established a strong expertise and leadership in engineered substrate bonding. We have worked closely with leading research institutes and inventors of SOI technology, and we are very proud that SMART has chosen our high-throughput, high-yield EVG850 system for their advanced technology development efforts," adds Frank Huysmans, regional sales director, Asia/Pacific at EV Group. 

"This is a testament to our leadership in engineered substrates, from R&D to high-volume manufacturing. SOI wafer producers and researchers rely on EVG's equipment to advance the production and technological capabilities of SOI wafers."
Purdue, imec, Indiana announce partnership
Resilinc partners with SEMI on supply chain resilience
NIO and NXP collaborate on 4D imaging radar deployment
Panasonic Industry digitally transforms with Blue Yonder
Global semiconductor sales decrease 8.7%
MIT engineers “grow” atomically thin transistors on top of computer chips
Keysight joins TSMC Open Innovation Platform 3DFabric Alliance
Leti Innovation Days to explore microelectronics’ transformational role
Quantum expansion
indie launches 'breakthrough' 120 GHz radar transceiver
Wafer fab equipment - facing uncertain times?
Renesas expands focus on India
Neuralink selects Takano Wafer Particle Measurement System
Micron reveals committee members
Avoiding unscheduled downtime in with Preventive Vacuum Service
NFC chip market size to surpass US$ 7.6 billion
Fujifilm breaks ground on new €30 million European expansion
Fraunhofer IIS/EAS selects Achronix embedded FPGAs
Siemens announces certifications for TSMC’s latest processes
EU Chips Act triggers further €7.4bn investment
ASE recognised for excellence by Texas Instruments
Atomera signs license agreement with STMicroelectronics
Gartner forecasts worldwide semiconductor revenue to decline 11% in 2023
CHIPS for America outlines vision for the National Semiconductor Technology Center
TSMC showcases new technology developments
Alphawave Semi showcases 3nm connectivity solutions
Greene Tweed to open new facility in Korea
Infineon enables next-generation automotive E/E architectures
Global AFM market to reach $861.5 million
Cepton expands proprietary chipset
Semtech adds two industry veterans to board of directors
Specialty gas expansion
×
Search the news archive

To close this popup you can press escape or click the close icon.
Logo
×
Logo
×
Register - Step 1

You may choose to subscribe to the Silicon Semiconductor Magazine, the Silicon Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: