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Industry News


Monday 26th February 2018
Image: EUV single patterning of (left) the N5 32nm metal-2 layer, (middle) 32nm pitch dense lines, and (right) 40nm hexagonal contact holes and pillars
Monday 26th February 2018
Qualcomm anticipates that its future Snapdragon 5G mobile chipsets will use Samsung’s 7nm LPP EUV process technology
Monday 26th February 2018
Pilot line for laser-thinning advanced SiC, GaN, and sapphire wafers already processing customer substrates
Monday 26th February 2018
Thursday 15th February 2018
Live demonstrations will cover applications in computing, communications, and automotive
Wednesday 14th February 2018
Special-purpose chip reduces power consumption of public-key encryption by 99.75 percent, increases speed 500-fold.
Friday 9th February 2018
Thursday 8th February 2018
Handles homogeneous and heterogeneous chip integration with high-density packaging to enhance the efficiency of chip and passive design optimization
Thursday 8th February 2018
Above a false-color, plan-view SEM image of a lateral gallium oxide field effect transistor with an optically defined gate. From near (bottom) to far (top): the source, gate, and drain electrodes. Metal is shown in yellow and orange, dark blue represents dielectric material, and lighter blue denotes the gallium oxide substrate. Credit: AFRL Sensors Directorate at WPAFB, Ohio, US
Thursday 8th February 2018
MOCVD business 'back to normal' after months of IP litigation in US and Chinese courts
Wednesday 7th February 2018